MECHATRONICS ENGINEERING DEPARTMENT
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CSE-314: Logic Design


Course Home   



Lecture Notes   


Assignments     


Labs     




Course Meeting Times: 
Lectures: 3 hrs/week
Tutorials: 2 hrs/week


Recommended Textbooks: 
Digital Design, 4th Edition, 2007, M. Morris Mano, Michael D. Ciletti, Prentice-Hall, Inc


Examinations:
There will be a mid-term exam scheduled after  Lecture 7. The final exam is 3 hours long.

​
Tutorials: 
The purpose of the tuorialsis to give students experience in the subject by working out examples and expanding on the material presented in the lectures. Attendance and participation in the recitations is obligatory.


Homework: 
Homework problems will typically be assigned every Section and will be due as specified in the assignments section. The problem sets will be provided in the assignments section. Late homework will be accepted but with maximum of half the grade given. 
You may discuss the problems with others in class, but you must (a) write up your eventual solution independently, and (b) list the names of students with whom you discussed the problem set.


Grading: 
  • Final Exam 110
  • Semester Work 40
  • Total 150 


Course Contents: 
  • Binary Numbers
  • Boolean algebra and Logic gates 
  • Gate Level Minimization
  • Combination Logic
  • Synchronous sequential logic
  • Registers and Counters
  • Memory and Programmable logic
  • Design at RTL (Register Transfer Level)


List of Lectures:
  • Lecture 1 – Introduction
  • Lecture 2 - Binary Numbers
  • Lecture 3 - Binary Numbers
  • Lecture 4 - Boolean algebra and Logic gates 
  • Lecture 5 – Gate Level Minimization
  • Lecture 6 – Combination Logic
  • Lecture 7 – Combination Logic
  • Lecture 8 – Combination Logic
  • Lecture 9 – Combination Logic
  • Lecture 10 – Combination Logic
  • Lecture 11 – Combination Logic 
  • Lecture 12 – Combination Logic and VHDL
  • Lecture 13 – Synchronous sequential logic
  • Lecture 14 – Synchronous sequential logic
  • Lecture 15 – Synchronous sequential logic
  • Lecture 16 – Synchronous sequential logic
  • Lecture 17 – Registers and Counters
  • Lecture 18 – Registers and Counters 
  • Lecture 19 – Memory and Programmable logic
  • Lecture 20 – Design at RT
  • Lecture 21 – Project Demo Date
  • Lecture 22 – Project presentations
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